Our ESL technology, so-called software-hardware partitioning, automatically synthesizes target electronic system into an optimum architecture. The said architecture is represented as a Virtual Platform to realize the software-hardware co-design. Fundamental requirements of the Virtual Platform are:
- Truthfully mimic target system’s address mapping and IP functionalities. Utilizing the Instruction Set Simulator (ISS) of each and every processor in the architecture, the virtual platform can support in-target execution of firmware and software.
- The simulation speed is at worst 1,000 times slower than the actual hardware, i.e. 1 sec hardware clock can be simulated within 16 minutes and 40 seconds. Thus, one can quickly verify the target software and hardware performance, power consumption and BOM list.
Micro-IP’s advanced Electronic System Level technology (ESL) can bring you:
- Fast and automated synthesis tool to generate the optimum system architecture
- Verify the performance, power consumption and BOM list of the system design at the earliest stage of system development
- A virtual platform as the golden model to verify the hardware implemented
- A virtual platform for in-target software development
- A fast system bring-up when the system prototype is available
- Unified verification test bench from early design stage all the way to prototype and production, ensuring the design accuracy and quality
Micro-IP’s advanced ESL design methodology allows the design team to come up with the optimum product in a 25% shorter time.