关于 MicroIP Inc.

MicroIP aims to provide outstanding services and products for AI on chip design. We support FPGA for traditional market and for AI market. With in-house Architecture Compiler (MAC) EDA tool, we vertical integrate EDGE AI on FPGA not only for prototyping and for mass market to meet diverse market demand. FPGA transition to AI on chip ASIC design is seamless when customer is ready to drive for bigger volume.

We also cater the needs for AI on chip performance analysis with MicroIP SoC performance analyzer (MPA) EDA tool. Customer no longer requires months to find out the performance issue, it can be done in weeks or days. It helps customer reduce R&D design time and time to market. Right after customer finish the front-end design, we help customer ready for tape out without any performance issues.

团队

James Yang (GM)

Management

Experience
  • Hardware Dept. Manager, Lionic Corp.
  • Research Fellow, Dept. ECE, NYU
education background
  • NYU / PhD Candidate

Gavin Liu (VP)

R & D Engineering

Experience
  • Hardware Tech. Manager, Lionic Corp.
  • Hardware Assistant Manager, Cion Tech.
  • Senior Engineer, Faraday Tech.
education background
  • NYUST / BS EE

Bo-Cheng Lai (CTO)

R & D Architecture

Experience
  • Professor, Dept. EE, NYCU
  • Staff Scientist, Broadcom, US
  • Research Engineer, Xilinx, US
education background
  • UCLA / PhD

Roger Wang (VP)

Sales and Marketing

Experience
  • Senior Sales Director, ARM Ltd.
  • Senior Manager, Microsoft
  • Regional Sales Manager, Broadcom
  • APAC Product Marketing Manager, Intel
education background
  • Bowie State U. / MS MIS

Hector Cheng (VP)

Finance

Experience
  • CEO, The Lavender Garden LTD Co.
  • Manager, Taipei Fubon Bank & Fubon Life
  • MIS programmer, MiTAC INCORPORATED
education background
  • CYCU / BS MATH