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  • uIP: 300 mA Capless LDO in 130 nm (VLDS0300LS130)
  • uIP ID: 507022355
  • μIP Type: Analog μIP
  • HDL: Verilog Behavioral Model
  • Warranty: NO
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Design Format: GDS & Schematic
  • Merge In Foundry: NO
    Designer Information
  • Member ID:1452413000700125
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

Power Quencher® Capless LDO (Silicon-proven 130 nm, 300 mA, excellent quiescent current and load transient regulation)

The Power Quencher® series of fully-integrated low dropout (LDO) voltage regulators operates with ultra-low levels of power consumption without sacrificing other areas of performance. They achieve a low-noise output voltage and do not require the external output capacitor that is typically needed in an LDO for loop stability and noise reduction. This saves component count, board space and cost, and improves overall system reliability.

The Power Quencher® LDO voltage regulator IP cores are optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and Internet of Things (IoT) applications.


2. License Price:

By Quotes

Multiple License : NO


3. Trial Run Price:

By Quotes


4. Clock Rate:

None


5. Area:

None


6. Technology:

130 nm


7. Version:

1.0