HEART (High Efficient Accumulative Repairing Technical) is a built-in self-repair (BISR) mechanism which uses to recover errors detected after memory testing and to improve yield rate. This mechanism is implemented with spare memories and a built-in redundancy analyze (BIRA) logics which is designed to allocate the redundancy. It needs a storable device (eFuse, OTP or registers) to store testing results after analysis.
We provides an efficient accumulative repairing solution to combine advantages of soft BISR mechanism and hard BISR mechanism for improving yield rate.
2. License Price：
Multiple License : YES
- Discount for 2 ~ 5 license：10 %
- Discount for 6 ~ 10 license：15 %
- Discount for 11 ~ license：0 %
3. Clock Rate：
4. Logic Gate Count：
5.25 K Gates