TW / Global Website







IP Mart




Mart > IP Mart

   

 
  • uIP: High Stable Timers IP
  • uIP ID: 1387449418
  • μIP Type: Digital μIP
  • HDL: Verilog
  • Warranty: YES
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Design Format: RTL and Netlist
  • Merge In Foundry: NO
    Designer Information
  • Member ID:2022490000500561
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

Timers are used for scheduling the different activities within the system. Timers generates interrupt in system and Operating system(OS) Schedules different Timers and maps them to different Interrupt Service Routine (ISR) to start on different interrupts. It can happen before starting a activity or application, OS configures a timers and give control to application to operate. On Interrupt trigger a interrupt, ISR kicks in and passes control back to OS.

A Miss Function on this block can make system to mis-behave a lot. These section explains issues with normal timers and benefits of this high stable timers over conventional timers.

-The Problem with Current Technology 

Timers carry large counters, Registers, clocks pre-scalers and synchronizations and all these are built by Simple Components which do not have any stability. 
If the SOC is exposed to different hazards like radiations, sparks or other events. These logics can be corrupted within counters and registers carrying configuration.
This may result in corruption in stored configurations or counters or data or control passing by and can make interrupts to be generated fast or slower rate or even stopped.
If system gets faster interrupt, then expected will make control to passed back to Operating system(OS) from the application or much before the application actually able to complete the task. This make system to not able to perform the required task.
if interrupts generation is slowed down, will keep the OS waiting much longer to get control and application work is finished long back. This can make system to slow down or Hang.

Timer 2.jpg

-The Solution

High Stable Timers from GreenIPCore can sustain across all system un-stability and misbehavior problems.
This Timers is strengthening system against any kind of dirty Electromagnetic noise and capable of protecting the System operation without disruption.
The Timers is constructed with high stable components. The High Stable Timers shown above will not fail due to any hazardous event.

Timer 3.jpg

 


2. License Price:

By Quotes

Multiple License : NO


3. Clock Rate:

0.8 MHz


4. Logic Gate Count:

None


5. Technology:

None


6. Version:

1.0