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  • uIP: PLL 800M UMC 28 nm logic and Mixed-Mode HPC process
  • uIP ID: 1939907544
  • μIP Type: Analog μIP
  • HDL: Verilog Behavioral Model
  • Warranty: YES
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Design Format: GDS
  • Merge In Foundry: YES
    Designer Information
  • Member ID:8972661000700018
  • Designer Rating:
  • Feedback received:0
 

1. Introduction:

It is a 28-nm low-power spread spectrum clock generator that supports an operating frequency ranging from 400 MHz to 800 MHz and from 200 MHz to 400 MHz.
This SSCG is programmable to perform the frequency synthesis and spread-spectrum function for the Electro Magnetic Interference (EMI) reduction in various ASIC designs.


2. License Price:

By Quotes

Multiple License : NO


3. Trial Run Price:

By Quotes


4. Clock Rate:

800 MHz


5. Area:

230 μm^2


6. Technology:

28 nm


7. Version:

1