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WiFi Frequency Synthesizer IP In 2.4GHz Band 100000 Points 200.000 K μm^2 3.2 GHz 55 nm  
The frequency  synthesizer  uses  a  single  1.25V  power supply.  Good  noise  immunity  allows  this  IP  to  be integrated  in  a  noisy  SOC environment.  The  synthesizer  operates  at  1.5X  WiFi  2.4GHz  band  for  wireless application.  Introduction
USB2.0 UTMI Device PHY(non-oscillator) 100000 Points 280.000 K μm^2 30.6 MHz 40 nm  
The USB PHY is an UTMI compatible USB2.0 device PHY IP which does not  require external oscillator reference. It is comprised of both USB1.1 and USB2.0  transceivers and it is also comprised of digital logic needed to convert USB serial  data to 8 or 16 bit parallel data. Introduction
10-bit 165 MSPS ADC IP in 28 nm 80000 Points 70.000 K μm^2 165 MHz 28 nm  
UIP_ADC10_165M_564144 is an ultra-compact and very low power analog-to-digital converter (ADC) silicon IP. The 10-bit 165 MSPS ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs.   The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. The ADC is designed for high dynamic performance for input frequencies up to Nyquist. This makes the IP perfectly suitable for video, imaging and communication appliances.   The IP is available in different metal options as well as deep N-well (DNW) option for SoC with high level of substrate noise. It consumes only 12mW at 165 MSPS operation and requires silicon area of 0.07 mm^2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The output data of ADC is available in 2’s complement format.   UIP_ADC10_165M_564144 can be used in the following applications:   ‧Digital imaging ‧TV/Video ‧Wireless LAN ‧Rx communication channel Introduction
10-bit 165 MSPS ADC IP in 28 nm 80000 Points 70.000 K μm^2 165 MHz 28 nm  
UIP_ADC10_165M_809744 is an ultra-compact and very low power analog-to-digital converter (ADC) silicon IP. The 10-bit 165 MSPS ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs.   The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. The ADC is designed for high dynamic performance for input frequencies up to Nyquist. This makes the IP perfectly suitable for video, imaging and communication appliances.   The IP is available in different metal options as well as deep N-well (DNW) option for SoC with high level of substrate noise. It consumes only 12mW at 165 MSPS operation and requires silicon area of 0.07 mm2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The output data of ADC is available in 2’s complement format.   UIP_ADC10_165M_809744 can be used in the following applications:   ‧Digital imaging ‧TV/Video ‧Wireless LAN ‧Rx communication channel ‧IOT Introduction
USB2.0 OTG PHY in 40 nm 80000 Points 257.556 K μm^2 30.6 MHz 40 nm  
The IP is an UTMI+ Level 3 compatible USB2.0 OTG function  transceiver IP. It is comprised of both USB1.1 and USB2.0 transceivers; itis  comprised of digital logic needed to convert USB serial data to 8 or 16 bit parallel  data for high speed and full speed. It is also support full speed and low speed  serial mode. Introduction
10-bit 165 MSPS ADC IP in 130 nm 70000 Points 210.000 K μm^2 165 MHz 130 nm  
UIP_ADC10_165M_166413 is an ultra-compact and very low power analog-to-digital converter (ADC) silicon IP. The 10-bit 165 MSPS ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs.   The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. The ADC is designed for high dynamic performance for input frequencies up to Nyquist. This makes the IP perfectly suitable for video, imaging and communication appliances.   The IP is available in different metal options as well as deep N-well (DNW) option for SoC with high level of substrate noise. It consumes only 48mW at 165 MSPS operation and requires silicon area of 0.21 mm2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The output data of ADC is available in 2’s complement format.   UIP_ADC10_165M_166413 can be used in the following applications:   ‧Digital imaging ‧TV/Video ‧Wireless LAN ‧Rx communication channel ‧IOT Introduction
[110nm] 10-bit 165 MSPS ADC IP 70000 Points 210.000 K μm^2 165 MHz 110 nm  
UIP_ADC10_165M_213779 is an ultra-compact and very low power analog-to-digital converter (ADC) silicon IP. The 10-bit 165 MSPS ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs.   The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. The ADC is designed for high dynamic performance for input frequencies up to Nyquist. This makes the IP perfectly suitable for video, imaging and communication appliances.   The IP is available in different metal options as well as deep N-well (DNW) option for SoC with high level of substrate noise. It consumes only 48mW at 165 MSPS operation and requires silicon area of 0.21 mm2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The output data of ADC is available in 2’s complement format.   UIP_ADC10_165M_213779 can be used in the following applications:   ‧Digital imaging ‧TV/Video ‧Wireless LAN ‧Rx communication channel ‧IOT Introduction
12-Bit 320MPS IQ DAC in TSMC40LP 70000 Points 250.000 K μm^2 320 MHz 180 nm  
UIP_DAC12X2_320M_922687  is  compact  and low  power  12-bit  digital-to-analog  converter silicon  IP  in  IBM  180nm  SOI  process.  It features two channel current steering DAC.  This  IQ  DAC  IP  is  optimized  for  low  power and  small  area.  At  320  MHz  conversation rate,  it  only  consumes  63mW  and  occupies silicon area of 0.25 mm2.   APPLICATIONS​ WiFi / LTE / WiMax​ Wireless MIMO Digital Video Communication Transmit   Introduction
10-bit 300 MSPS Video DAC IP in 90 nm 60000 Points 76.000 K μm^2 300 MHz 90 nm  
The  UIP_DAC10-300M_205370  is  a  10-bit  DAC designed  in  low  power  TSMC  90  nm  logic process. It consists of a current steering DAC. The DAC uses a fully differential architecture. The  input  data  of  the  DAC  is  in  1.2V,  in unsigned format.   A 3.3V  supply  is used for  the analog  portion of  the  IP.  This  high  performance  DAC  is designed  for  CVBS  standard  or  RGB  Video signal  bandwidth.  The  IP  consumes  only  41 mA  at  300  MSPS  operation  and  utilizes  a silicon area of only 0.076 mm2. The IP does not  require  any  external  decoupling  and  is ideal for integration in mixed-signal systems.   The  DAC  output  current  is  6-bit programmable.  The  IP  architecture  is  robust and can be ported to other 90 nm processes.   APPLICATIONS Composite Video (CVBS) HDTV RGB Video ​ DAC Output Model Introduction
10-bit 80 MSPS ADC IP in 130 nm 60000 Points 210.000 K μm^2 80 MHz 130 nm  
UIP_ADC10_80M_156287 is an ultra-compact and very low power analog-to-digital converter (ADC) silicon IP. The 10-bit 80 MSPS ADC includes an internal custom bandgap voltage reference. It is capable of supplying bias currents to other parallel ADCs.   The ADC uses fully differential pipeline architecture with custom low-disturbance digital correction technique which allows single supply bus for both digital and analog. The ADC is designed for high dynamic performance for input frequencies up to Nyquist. This makes the IP perfectly suitable for video, imaging and communication appliances.   The IP is available in different metal options as well as deep N-well (DNW) option for SoC with high level of substrate noise. It consumes only 24mW at 80 MSPS operation and requires silicon area of 0.21 mm2. The IP does not require any external decoupling and is ideal for integration in mixed-signal systems. The output data of ADC is available in 2’s complement format.   UIP_ADC10_80M_156287 can be used in the following applications:   ‧Digital imaging ‧TV/Video ‧Wireless LAN ‧Rx communication channel Introduction
μIP Price Logic Gate Count Clock Rate Technology   Ratings

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