Service Detail

ESL Design Flow I – MicroIP Proprietary

Existing Design Flow with Optimized Architecture

Service Introduction

Micro-IP provides ASIC and SoC design, from algorithm, RTL/Schematic design to Tape out, it can be completed on a single platform with logic and mixed-signal design flow ranging from 0.5um to 7nm. Applications include consumer electronics, multimedia, communication networks, and computer peripherals, storage devices, blockchains, Internet of Things, car networking, etc.

Micro-IP proprietary ESL software, can explore the optimal system architecture and establish a virtual verification platform at the beginning of the system design. The flow can assist developers to validate target architectures, reduce development time, cost, and improve product quality.