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  • μIP NO.: 2054614470
  • μIP Type: Analog μIP
  • Wanted μIP: Delta sigma DAC 24bit
  • HDL: Verilog Behavioral Model
  • Wanted Design Format: GDS or Schematic
  • Simulation Tool: Cadence NC-Verilog
  • Tool Version:
  • Post Date: 2018-07-05
  • Deadline: 2018-11-30
  • Wanted Payment: 20000 Points
  • Sharing Mechanism: NO
    Wanter Information
  • Member ID: 7021723000200450
  • Number of Wanted Posted: 1
  • Number of Try Run:0
  • Number of Successful Transaction:0

1. Description:

The IP has stereo digital-to-analog output systems including interpolation, multibit D/A conversion
and  output  analog  filtering .  The IP supports major audio data interface formats.  Individual  devices  differ  only  in  the  supported interface format.


The IP is based on a fourth-order multibit delta-sigma modulator with a linear analog low-pass filter. This IP also includes autospeed mode detection using  both  sample  rate  and  master  clock  ratio  as  a
method of auto-selecting sampling rates between 2 kHz and 200 kHz.


The IP contains on-chip digital deempha-sis, operates from a single +3.3 V or +5 V power supply,and requires minimal support circuitry. These features are  ideal  for  DVD  players  &  recorders,  digital  televisions,  home  theater  and  set  top  box  products,  and automotive audio systems.

 

2. Clock Rate:

non-limit 

3. Area:

non-limit 

4. Technology:

110 nm