At the 2025 COMPUTEX Taipei “Collaborative Robotics Applications Forum,” MICROIP Inc., a leading provider of ASIC design and AI software platforms in Taiwan, was represented by CTO and General Manager of the IC Design Business Unit, Dr. Wu Chan-Liang, who delivered a keynote speech titled “From Chips to AI Deployment: How MICROIP Builds High-Efficiency Robotic Solutions.” Addressing the challenges from core module design to edge deployment in AI robotics, Wu introduced MICROIP’s self-developed “Dual-Engine Strategy,” which garnered significant interest from industry and academia.

Wu emphasized that AI-powered robots are rapidly transforming industries and daily life, becoming a key force in the next wave of technological revolution. However, he noted, “Real AI impact comes not just from smart software, but from the deep integration between AI design capability and ASIC hardware performance. Even the most advanced AI models are ineffective without efficient chips—high latency and excessive power consumption prevent practical deployment. Likewise, even the most efficient ASIC chips cannot perform well without smart design frameworks and optimization strategies."

Using examples from smart dining and inspection robotics, Wu highlighted how post-pandemic demand for contactless services is accelerating AIoT and robotic adoption. With advancements in chip performance and maturity in development platforms, the barriers to AI robotics implementation are falling. MICROIP has observed a shift from months-long development cycles to just a few weeks, bringing real-time AI applications to the forefront of industry competition.

• CATS (Custom ASIC Technology & Solutions) offers one-stop ASIC development services—from architecture design, RTL verification, layout and packaging, to mass production—ensuring AI algorithms are efficiently and precisely implemented with low power consumption.

• CAPS (Cross-Platform AI Powered Solutions) is a modular, cross-platform AI software toolchain that supports model training, deployment, monitoring, and optimization—empowering businesses to adopt AI rapidly and manage it effectively.

“An AI robot’s brain lies in this fusion: smart, responsive AI design and low-power, high-efficiency ASIC chips,” said Wu. “If software and hardware are not well coordinated, AI can backfire—raising costs, slowing systems, and damaging user experience.” He concluded that the future of industrial competition will hinge not on isolated breakthroughs, but on who can masterfully integrate AI software and ASIC hardware to build truly efficient, intelligent robotic systems.

During his session, Wu also showcased real-world examples of MICROIP’s ASIC chip development, including an AI Vision SoC built on TSMC’s 22ULL process that integrates multiple clock domains and has completed FPGA verification and prototyping. He also introduced the AIVO toolchain within the CAPS platform, which streamlines processes like model pruning, format conversion, deployment monitoring, and OTA updates—significantly boosting system efficiency and stability.

MICROIP’s dual-engine solutions are already in use across diverse domains such as smart dining, warehousing, driver safety monitoring, and industrial inspection—helping customers implement AI in real-world scenarios. This COMPUTEX presentation underscored MICROIP’s leadership in the AI-ASIC convergence space and outlined a scalable, efficient roadmap for the future of intelligent robotics.